1 .title M9312 'DX' BOOT prom for RX11 compatible controller 2 3 ; This source code is an exact copy of the DEC M9312 23-753A9 boot PROM. 4 ; 5 ; This boot PROM is for any RX11/RX01 compatible floppy controller. 6 ; 7 ; Multiple units and/or CSR addresses are supported via different entry points. 8 ; 9 ; Standard devices are 82S131, Am27S13, 74S571 or other compatible bipolar 10 ; PROMs with a 512x4 TriState 16pin DIP architecture. This code resides in 11 ; the low half of the device; the top half is blank and unused. 12 ; 13 ; Alternatively, 82S129 compatible 256x4 TriState 16pin DIP devices can be 14 ; used, as the uppermost address line (hardwired low) is an active low chip 15 ; select (and will be correctly asserted low). 16 17 177170 rxcsr =177170 ; std RX11 csrbase 18 19 000000 rxcs =+0 ; command/status 20 000002 rxdb =+2 ; data buffer 21 22 165564 diags =165564 ; console diags phase2 entry 23 24 .asect 25 173000 .=173000 26 27 ; -------------------------------------------------- 28 29 173000 130 104 start: .ascii "XD" ; device code (reversed) 30 31 173002 000176 .word last-. ; offset to next boot header 32 33 173004 000261 dx0n: sec ; boot std csr, unit zero, no diags 34 173006 012700 000000 dx0d: mov #0,r0 ; boot std csr, unit zero, with diags 35 173012 012701 177170 dxNr: mov #rxcsr,r1 ; boot std csr, unit 36 173016 010704 dxNb: mov pc,r4 ; boot csr , unit 37 173020 103056 bcc diag ; br if diags requested 38 173022 000402 br go ; return to (R4)+2 from diags 39 ; then skip over pseudo reboot vector 40 41 ; -------------------------------------------------- 42 43 173024 173000 .word 173000 ; prom start addess @ 24 44 173026 000340 .word 340 ; and priority level @ 26 45 46 ; -------------------------------------------------- 47 48 173030 000241 go: clc ; clear carry 49 173032 012703 001407 mov #<003*400>+007,r3 ; unit zero, read+go 50 173036 132700 000001 bitb #1,r0 ; test unit ID 51 173042 001402 beq 2$ ; br if zero 52 173044 012703 011427 mov #<023*400>+027,r3 ; unit one, read+go 53 54 173050 132711 100040 2$: bitb #100040,(r1) ; test error<15> or done<5> 55 173054 001775 beq 2$ ; neither, keep looping 56 57 173056 110311 movb r3,(r1) ; exec read+go on unit 58 59 173060 111105 3$: movb (r1),r5 ; wait for transfer req 60 173062 100376 bpl 3$ ; not yet, keep looping 61 62 173064 112761 000001 000002 movb #1,rxdb(r1) ; set track/sector 1 63 173072 106003 rorb r3 ; 007 -> 003 -> 001 -> 000 64 173074 102771 bvs 3$ ; loop three times 65 66 173076 032711 100040 4$: bit #100040,(r1) ; test error<15> or done<5> 67 173102 001775 beq 4$ ; neither, keep looping 68 173104 100412 bmi 6$ ; br if error 69 70 173106 000303 swab r3 ; R3=003/023 unit0/1 71 173110 110311 movb r3,(r1) ; exec emptybuf+go on unit 72 73 173112 005003 clr r3 ; bus address ptr 74 173114 105711 5$: tstb (r1) ; wait for data transfer req 75 173116 100376 bpl 5$ ; loop if not yet 76 173120 116123 000002 movb rxdb(r1),(r3)+ ; store data byte 77 173124 105703 tstb r3 ; check address >= 128 78 173126 100372 bpl 5$ ; br if address in 0..127 79 80 173130 005007 clr pc ; jump to bootstrap at zero 81 82 173132 000005 6$: reset ; failed, reset controller 83 173134 000164 000002 jmp 2(r4) ; and retry from the beginning 84 85 ; -------------------------------------------------- 86 87 173140 012700 000001 dx1n: mov #1,r0 ; boot std csr, unit one, no diags 88 173144 000261 sec ; 89 173146 000721 br dxNr ; continue 90 91 173150 012700 000001 dx1d: mov #1,r0 ; boot std csr, unit one, ? diags 92 173154 000716 br dxNr ; continue 93 94 ; -------------------------------------------------- 95 96 173156 000137 165564 diag: jmp @#diags ; jump to console diags 97 98 ; -------------------------------------------------- 99 100 173162 000000 000000 000000 .word 0,0,0,0,0,0 ; unused 173170 000000 000000 000000 101 102 ; -------------------------------------------------- 103 104 173176 .=start+176 105 173176 105572 crc16: .word <105572> ; CRC-16 will go here 106 107 last: ; next boot prom starts here 108 109 .end 109